From Code to Chip: FDP Delivers End-to-End FPGA Design Experience

Bengaluru, 26th March 2026: A five-day Faculty Development Programme (FDP) on “Industry-Driven FPGA Design Flow: From RTL to Hardware Implementation” was conducted from 2nd to 6th February 2026 by the Department of Electronics and Communication Engineering (ECE), Faculty of Engineering and Technology, JAIN (Deemed-to-be University), Global Campus, in collaboration with MathWorks and Silicon Microsystems (SIMS). The programme brought together faculty members, researchers, postgraduate scholars, and industry professionals to engage with contemporary practices in FPGA design and implementation.

Designed to connect academic concepts with industry workflows, the FDP covered the complete FPGA design cycle, including hardware description language (HDL) coding, verification, synthesis, and hardware validation. Sessions combined expert lectures with hands-on training, enabling participants to work with tools such as MATLAB and Simulink while gaining exposure to model-based design and real-time hardware testing.

The programme featured contributions from academic and industry experts. Dr Ambika Prasad Shah addressed topics including hardware security, radiation-hardened circuits, and physically unclonable functions. Dr Manjeet Kumar led a session on digital signal processing (DSP) implementation using FPGA architectures, while Dr Ashish Kumar discussed the fundamentals of FPGA development and RTL design flow.

From industry, Manjunatha Naik V, Senior Application Engineer at CoreEL Technologies, conducted practical sessions on model-based design and FPGA testing. Harsha Neelakanta, Senior Manager – Education at SIMS, outlined current trends in the FPGA market and emerging career pathways. Kumar K G, Embedded Engineer at SIMS, led multiple hands-on modules covering verification techniques, UART IP design, interfacing, and mini-project development.

The FDP saw participation from 30 delegates across academia and industry, fostering a collaborative learning environment. The initiative reflects the University’s ongoing efforts to align technical education with evolving industry requirements, particularly in areas such as VLSI design, embedded systems, and hardware-based innovation